Build. Debug. Validate.
NEWSLETTER April 2026 Shop Blog Forum About This user‑created reference project showcases a real‑time Mandelbrot set renderer built entirely in FPGA logic on the Digilent Basys 3. Using VHDL and Xilinx Vivado, the design combines fixed‑point math, VGA video timing, and parallel pixel processing to generate fractal visuals directly from the Artix‑7 FPGA, no processor required. It’s a great example of how complex mathematical visualization and video output can come together in a single, hardware‑based design. Project Write‑Up GitHub Repository Shop Basys 3 This recent blog post walks through a practical mixed‑signal validation workflow using the Analog Discovery Pro ADP2440 , showing how analog and digital loopback testing can be combined in a single setup. Using WaveForms software, the workflow demonstrates how to generate, measure, and decode signals...
