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Issue Highlights
Editor's Note
It's
not enough to know how memory functions—you need to know how to apply
it. In this week's feature we present the first installment of a book
excerpt that not only reviews the basics of SRAM and SDRAM, but talks
about how to program the controllers. Learn all about how it works, based on a
detailed example, complete with sample code.
As we hit the dog days of summer, college students are headed off to
start degree programs. What advice would you give to a young engineering
student? What do you know now that you wish you'd known then?
I welcome your feedback and would love to hear from you about particular
topics you would like to see us cover. Have an idea for a contributed
article? Drop me a line and we can get the process started.
Until next week,
Kristin Lewotsky
Editor, Memory Designline
Klewotsky@chezhardy.com
How Tos
Learn
what you need to know about memory and programming memory controllers
for FPGAs.
There
is a growing class of verification engineers who are woefully
under-appreciated in terms of the complexity of the job they have to do
and the lack of tools made available to them…
One
of the main advantages of the FPGA is its ability to perform
mathematical functions as desired. Here's a refresher on the basic
rules and methods involved.
Algorithmic
memory leverages erasure encoding to allow simultaneous access of data
in the same location without memory bank conflicts or stalls.
Never
lose sleep over a new embedded hardware design again…
Memory
operations per second (MOPS) provides a better metric for assessing new
techniques like algorithmic memory.
Temporary
networks formed with compact, portable satellite base stations give
broad, robust access in emergencies.
Memory
test, repair, and diagnostic solutions can improve both the
manufacturing process and device performance.
TI's
Priya Thanigai provides some real world examples of where ferroelectric
random access memory should be considered as an alternative to flash as
a viable nonvolatile memory technology.
Although
multi-level cell NAND flash offers a cost advantage, single-level cell
NAND flash delivers longer lifetime, lower error rates, and better
performance for mission-critical applications.
FPGAs
connected to gigabytes of DDR is now common, so attention must be paid
to the probability and avoidance of soft errors.
Non-volatile
memory technology addresses demands of SoCs controlling 24/7 connected
devices.
Products
Also
debuts non-volatile, battery-backed serial SRAMs at significantly lower
cost than any other non-volatile SRAM, FRAM, or parallel SRAM.
Samsung
Electronics Co., Ltd., has begun volume production of an ultra-fast
embedded memory for smartphones, tablets and other mobile devices in
16-, 32- and 64-gigabyte (GB) densities.
The
eMMC Pro Class 1500 delivers sequential read speeds of up to 140 MB/s.
Low-power
17.78-mm memory module takes aim at telecom.
This
IP Core, for use in ASICs/SoCs and FPGAs, supports 10BASE-T and
100BASE-TX/FX IEEE 802.3-2002 compliant RMII PHYs.
Can
a simple server upgrade improve the performance of your EDA
applications? Netlist has a new memory module that they believe can
deliver…
I
just heard from those nice folks at Microsemi that they are hosting a
Free Webinar on August 28 2012 (8:00am to 9:00am Pacific Time).
The
new LabVIEW FPGA IP Builder software from National Instruments
incorporates high-level synthesis (HLS) technology to accelerate system
design through increased abstraction.
News
NAND
flash and DRAM are expected to lead the way as users increase their
adoption of cloud computing services.
The
market for mobile DRAM chips is expected to grow 10 percent in 2012, a
key factor in Micron Technology's decision to acquire Elpida Memory,
according to IHS iSuppli.
Over
the next five years the long-term growth rate for the semiconductor
market is going be more than double what it has been, according to
market research firm IC Insights.
Xilinx
honors NI LabVIEW FPGA innovation award winner at NIWeek graphical
system design achievement awards ceremony.
A
Moscow-headquartered investor has helped MRAM startup Avalanche
Technology close a third round of equity funding at $30 million. The
money will be used to "productize" the company's technology,
which the firm says is ready for action in applications such as
solid-state drives.
The
folks at Xilinx have announced their participation at NIWeek 2012,
booth #618, August 6-9, 2012 at the Austin Convention Center.
Fusion-io
is shipping Ion Data Accelerator, software to enable it flash memory
cards on a server to act as a storage networking array or appliance.
Memory
maker Spansion reported Q2 2012 revenue up 11 percent from Q1 to $233.4
million. Net income of $26 million compared with a first-quarter loss
of $13.1 million.
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